As digital circuitry and systems become more complex, and as the use of large scale circuit integration increases, it becomes increasingly important to ensure that a digital circuit design is accurate and performs to specification. On the other hand, however, it is also increasingly difficult, as the circuit complexity increases, to construct and test the actual integrated circuit chip. The difficulties include the time delays and expense involved in both construction and the eventual debugging of the chip. As a result therefore, there has been developed a family of digital system simulation apparatus and methods to check circuit design and provide error analysis without actually constructing the circuit either in discrete hardware components or in integrated circuit form.
Among the many systems which are available to perform simulation, perhaps the largest capacity system is that apparatus designed by IBM and known as the Yorktown Simulation Engine. This is a highly parallel, special purpose, programmable machine for the gate-level simulation of digital logic. It can operate at speeds of over 2 billion gate simulations per second.
The Yorktown Simulation Engine is an outgrowth of logic simulators which were developed as early as the mid-fifties. During the mid-fifties and early sixties, gate level simulation which however did not include delays, was available. In the later sixties and early seventies, gate level simulation employing some limited timing became available but was of limited use because of the amount of detail required to provide the logic simulation. Then, in the mid- to late seventies, a well-known and well-supported system known as TEGAS was developed for the high level simulation of VLSI logic. This logic could employ for example thousands of logic gates. Also, in the late seventies, better simulation tools began to be developed, primarily for in-house use.
These simulation devices thus enabled the debugging of printed circuit boards which was previously both time consuming and not error free. However, component tolerances continue to provide significant problems. Furthermore, as noted above, VLSI and LSI, with its very large number of components, are still very difficult to check in a practically priced, flexible system. And today, as LSI and VLSI chips are used in printed circuit boards, yet more problems are to be expected.
Therefore primary objects of the invention are improved simulation apparatus and methods, available at reasonable cost, for enabling more system flexibility, and for providing additional simulation capability with respect to speed, signal handling, reliability, and precision.